Description
The LVDS clock pod supports Keysight Technologies 16720A and 1670G-004 pattern generators. Each pattern generator requires at least one clock pod, up to 4 data pods, and lead sets for each clock and data pod. For each E8142A clock pod that you will be using, you will need one (1) 10498A lead set. Clock output type: 65LVDS179 (LVDS) and 10H125 (TTL) Clock output rate: 200 MHz maximum (LVDS and TTL) Clock out delay: ~8ns in 14 steps Clock input type: 65LVDS179 (LVDS with 100 ohm) Clock input rate: DC to 150 MHz (LVDS) Pattern input rate: 10H124 (TTL) ( no connect = logic 1) Clock in to clock out: approximately 30 ns Pattern in to recognition: approximately 15 ns + 1 clock period Recommended lead set: 10498A